1. Field of the Invention
This invention relates to a liquid crystal display device, and more particularly to an static electricity prevention circuit for a liquid crystal display that can restrain a badness generation caused by a static electricity during a manufacturing process thereof.
2. Description of the Related Art
Generally, a static electricity prevention circuit has to protect a thin film transistor array and a panel as a picture display region from a static electricity, etc. during a manufacturing process of a liquid crystal display (LCD) and should not cause an interference and a disturbance to a driving signal system under normal driving environment. Thus, the static electricity prevention circuit must have an adaptive characteristic in accordance with a voltage region. In other words, the static electricity prevention circuit must have low impedance at a high voltage while having high impedance at a low voltage. Since the conventional static electricity prevention circuit has been designed such that one circuit system corresponds to all of the two voltage regions, however, it fails to meet all of the high voltage and low voltage characteristic. Particularly, it is difficult for the conventional static electricity prevention circuit to realize a low impedance characteristic required for a high voltage region caused by a static electricity. Hereinafter, a problem of the conventional static electricity prevention circuit will be described in detail with reference to the accompanying drawings.
As show in FIG. 1, each static electricity prevention circuit 10 in the LCD is usually connected between each gate line Gn to Gn+3 and a common electrode line C. The static electricity prevention circuit 10 serves as a resistor enough a large to make no affect to an internal driving of a thin film transistor array under a normal operating voltage level, and acts as a discharge path when an over-voltage caused by a static electricity is loaded at both terminals thereof, that is, between each gate line Gn to Gn+3 and the common electrode line C. To this end, the conventional static electricity prevention circuit includes two or three transistors as shown in FIG. 2 or FIG. 3, respectively.
The static electricity prevention circuit shown in FIG. 2 has first and second transistors T1 and T2 connected between the common electrode line C and the gate line G. The first transistor T1 is turned on when a voltage higher than an operating voltage is applied to the common electrode line C, thereby discharging a current from the common electrode line C, via the first transistor T1, into the gate line G. The second transistor T2 is turned on when a voltage higher than an operating voltage is applied to the gate line G, thereby discharging a current from the gate line G, via the second transistor T2, into the common electrode line C. Since voltages applied to the common electrode line C and the gate line G are lower than operating voltages of the first and second transistors T1 and T2 under normal driving environment, the first and second transistors T1 and T2 are turned off to make no effect to an internal driving of the thin film transistor array.
The static electricity prevention circuit shown in FIG. 3 has first to third transistors T1 and T3 connected between the common electrode line C and the gate line G. The first transistor T1 is turned on when a voltage higher than an operating voltage is applied to the common electrode line C to turn on the third transistor T3, thereby discharging a current from the common electrode line C, via the third transistor T#, into the gate line G. The second transistor T2 is turned on when a voltage higher than an operating voltage is applied to the gate line G to turn on the third transistor T3, thereby discharging a current from the gate line G, via the third transistor T3, into the common electrode line C. Since voltages applied to the common electrode line C and the gate line G are lower than operating voltages of the first to third transistors T1 to T3 under normal driving environment, the first to third transistors T1 and T3 are turned off to make no effect to an internal driving of the thin film transistor array.
However, the above-mentioned static electricity prevention circuits fail to perform a role of the discharge path sufficiently to cause an insulation breakdown because a current amount passing in the transistor, that is, in the static electricity prevention circuit is small when an excessive static electricity is generated. Thin film transistors included in the prevention circuit or thin film transistors in the thin film transistor array has the same gate insulating film. Accordingly, most insulating breakdown caused by a static electricity more than a critical value is generated at an inner side of the array or each intersection between the gate lines and the data lines rather than the static electricity prevention circuit. Since an open circuit rather than a short circuit is liable to be generated even though the insulation breakdown has been generated at the static electricity prevention circuit to fail to form a discharge path, it is impossible to prevent an over-current caused by a static electricity from being flowed into the thin film transistor array.
The conventional static electricity prevention circuit has a voltage to current characteristic as shown in FIG. 4. Referring to FIG. 4, it can be seen that, when a voltage at both terminals of the static electricity prevention circuit under normal driving is low, a current does almost not flow due to a high impedance characteristic. On the other hand, as a voltage at both terminals of the static electricity prevention circuit increase continuously, a discharge path is formed to increase a discharge current amount. But, if a voltage between said both terminals becomes more than about 100V, then a constant current of 0.01 mA flows. When a discharge current amount is small, the static electricity prevention circuit fails to perform a function of preventing a static electricity properly. Moreover, when a voltage between the both terminals is a voltage (i.e., 200V) more than a critical value, the circuit is opened due to an insulation breakdown to have infinite impedance. Thus, a discharge path is not formed to prevent a flow of current.
As described above, since the conventional static electricity prevention circuit failed to have a low impedance characteristic at a high voltage region and thus failed to protect the thin film transistor array from a static electricity properly, it was difficult to reduce a ratio of badness generation in the thin film transistor array caused by a static electricity.
Accordingly, it is an object of the present invention to provide a static electricity prevention circuit for a liquid crystal display wherein a device for confronting a high voltage is added so that a badness generation caused by a static electricity during a manufacturing process of the liquid crystal display can be restrained.
In order to achieve these and other objects of the invention, a static electricity prevention circuit for a liquid crystal display according to an embodiment of the present invention includes at least two transistor devices connected, in parallel, between a common electrode line and each of the gate lines and/or the data lines; and a capacitor device, being connected between the common electrode line and the gate lines and/or the data lines, to discharge an over-current caused by a static electricity from any one of the common electrode line and the gate lines and/or the data lines into other electrode line.